1. Field of the Invention
The present invention relates to wafer level image sensor packaging structures and manufacturing methods of the same, and more particularly, to a wafer level image sensor packaging structure and a manufacturing method of the same applicable to batch fabrication of the image sensor packaging structure.
2. Description of Related Art
In recent years, digital imaging electronic products are becoming more popular. Camera cell phones, digital cameras, and digital video recorders have evolved into such a generation that they have become indispensable to every person. Given the increasing demand for imaging electronic products, it is easy to conceive the rapid speed at which the image sensor market expands.
Among the conventional methods for packaging image sensors are two predominant ones, namely Chip On Board (COB) and Chip Scale Package (CSP). In COB, an image sensing chip is adhesively attached to a substrate, and then the image sensing chip is electrically connected to the substrate by means of metal wires. As a result, the image sensor packaging structure is of a relatively large size and a considerable height when packaged. In addition, during the COB packaging period, the image sensor packaging structure is susceptible to dust intrusion or moisture permeation and thus likely to have a low conforming rate. Hence, COB has a high demand for a cleanroom that must be highly clean. As a result, COB incurs high process costs.
CSP is qualified as package scale with its length no greater than 1.2 times and its area no greater than 1.44 times that of the bare die by visual inspection. Hence, compared to COB, a packaging structure combining chip scale package with chip level package can leave out substrates and metal wires thereof, so as to cut the cost of packages and go with the trend of compact size electronic products nowadays.
However, conventional wafer level image sensor packaging structures have a drawback, that is, the image sensing chip is thin and thus likely to crack, which is particularly the case where, upon completion of a packaging process, all the lateral sides of the image sensing chip are exposed and thus more likely to be hit during a back-end process for assembling an image sensor, thereby resulting in a decrease of the product conforming rate.